[electronicsrobotics]

Memory map for single-chip, expanded multiplexed, special bootstrap, and special test. Memory locations are the same for single-chip and expanded multiplexed modes ( www.electronicsrobotics.com )

The first 256 bytes from 0000 to 00FF constitute internal RAM. The 64 byte register block is mapped to $1000 after next and also corresponds to SFR of 8096. It can be placed at any other 4k boundry ($x000) by writing an value to the INIT register the 512 bytes of EEPROM be from B600H to B7FFH .The 8K internal ROM lies from F000H to FFFFH.
The special bootstrap operating mode memory locations are similar to the single-chip operating mode memory locations except that a bootstrap program at memory locations $BF40 through $BFFF is enabled. The reset and interrupt vectors are addressed at $BFC0-$BFFF while in the special bootstrap operating mode. These vector addresses are within the 192 byte memory used for the bootstrap program.

The special test operating mode memory map is the same as the expanded multiplexed operating mode memory map except that the reset and interrupt vectors are located at external memory locations $BFC0-$BFFF.[url][/url]

[torbjorn]

Usually, PLC vendors support their customers with free development tools, i think you should first check with the manufacturer of the PLC you are going to develop a program for.

[rajrech]

Friends,

I am looking for PLC programming software with Simulator. My budget is less than $15. can any one show me the site.

Thanks

Adams